Technical delivery conditions (TLB), recommendations and design rules for printed circuit boards
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Technical Delivery Conditions (TLB)
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Technical delivery terms (TLB)
Overview
1. Products
Our product range includes single-sided PCBs, double-sided PCBs and through-hole PCBs, multilayers with up to 24 layers and semi-flexible PCBs from prototypes to (large) series. Our processes are designed to ensure the highest quality and reliability. PRECOPLAT is your competent printed circuit board manufacturer in Germany.
For medium and large series of up to 25 m² per order, we offer an express service, which can be implemented as follows:
Our service starts with technical support and extends to integration into our customers' supply chain management, taking into account every unique specification and individual requirement.
2. Dating
Our CAM employees ensure the implementation of your layouts right up to the finished circuit board.
If you are unable to generate the files in the formats described, please contact our sales team.
You can send us your production data in the following formats:
2.1. Layout data
- Extended Gerber 274x (standard)
- Gerber 274
- Eagle
- Autodesk Fusion 360
- ODB++
2.2. Drilling and milling data
- Excellon (Standard)
- Drillfile in Sieb & Meyer Format 3000
Mechanical drawings can also be submitted in HPGL or DXF format.
3. Design Rule Check
All data supplied to us is checked for manufacturability using a standard Design Rule Check according to IPC-2211 as well as customer-specific DFM functions. Additional services (e.g., impedance checks, layout/data changes, reverse engineering) are provided upon request and only after a separate order.
3.1. HDI/Micro-Vias
For micro-vias (HDI), we are guided by IPC-2221 / IPC-2226 as well as the ZVEI Design GuidelinesThe following guidelines apply to the Design Rule Check:
- Rest ring on micro vias: ≥ 100 µm (standard), ≥ 75 µm (special).
- Aspect Ratio Micro-Vias (drilling depth ÷ hole diameter): ≤ 1 : 1.
Example: Hole diameter 100 µm, drilling depth 63 µm → AR = 0,63 : 1.
Note: Copper foil thickness according to 6.2. Standard copper foil thickness (before galvanic copper plating)Deviations are possible after prior consultation. For BGA / CSP / Flip-Chip / COF, we take this into account in the Design Rule Check and data verification (including pad geometry, via-in-pad, annular ring, solder mask, and clearances).
3.2. Optional Engineering Services
Software-based impedance control (= in-depth control): Creation of a polar report (calculation/validation) based on the approved layer structure; target values and tolerances according to customer specifications.
Reverse Engineering (Reading of submitted printed circuit boards): Recording of the layer structure, acquisition of conductor pattern/drilling data/network information and reconstruction of CAM-compatible manufacturing data (e.g. Gerber/ODB++); Implementation only if usage rights have been clarified by the client.
4. quality
4.1. Quality standards
We manufacture Unpopulated printed circuit boards according to IPC-6012 (including Addendum - Space and Military / Medical (on request)), Class 2 or Class 3. Acceptance testing is carried out according to IPC-A-600, Class 2 or Class 3.
In addition, we support the following standards/specifications upon request:
- Solder resist (material/qualification): IPC-SM-840
- Final surface (ENIG): IPC-4552
- Design basics (customer layout): IPC-2221
- HDI/Micro-Vias Design (Customer Layout): IPC-2226
- PERFAG (European specification for supply agreements & quality levels)
- PERFAG 1 – one-sided
- PERFAG 2 – double-sided
- PERFAG 3 – Multilayer
Semiflex (FR4 thinned, “flex-to-install”): Manufactured as a rigid printed circuit board according to IPC-6012; inspected according to IPC-A-600; not an IPC-6013 product.
Revision valid at the date of order confirmation.
4.2. Quality Assurance
We comply with UL® standards and RoHS guidelines and are certified according to DIN EN ISO 9001. Production parameters, production conditions and raw materials are evaluated and registered using calibrated measuring devices.
The circuit boards are subjected to the following tests during the production process to ensure impeccable quality:
non-destructive testing
For optical inspections, we use IPC-A-600 as an image reference; acceptance depends on the ordered class (Class 2/3). AOI minimum structure: 25 µm. Specific inspection procedures can be adapted to other specifications at any time if required.
destructive testing
- micrograph creation,
- adhesion test,
- Delamination test (multilayers are regularly subjected to thermal shock tests).
documentation of the parameters
Automatic recording and storage of the following parameters for at least 10 years:
- production parameters,
- quality-related results,
- Time recording, including the respective employees.
X ray
X-ray fluorescence spectrometry for layer registration and layer thickness measurement.
AQAP
AQAP-2110 requirements are implemented internally. For projects subject to AQAP requirements, we plan the official quality assurance assessment (GQA) and apply for BAAINBw confirmation on a project-specific basis.
5. Electrical test
During the final electrical test, circuit boards are checked for opens and short circuits.
The client's Gerber data is loaded into our test system, from which a netlist is generated that contains all the test points identified. These test systems test according to the following criteria as standard:
- to interruption if > 10 Ohm network resistance is detected
- to short circuit if resistances < 10 MegOhm are detected between independent shunts
We use the following test systems:
5.1. Test adapter/parallel tester
Based on the test program, adapter plates are drilled and fitted with test needles, which are deflected to the relevant contact points in order to simultaneously detect all end points of the electronic network for the test process for short circuits and interruptions. At the same time, all networks are tested against each other. The test result is then compared with the electrical network list.
5.2. Finger tester (flying probe)
Alternatively, the electrical test can be carried out using a finger tester. The contact points of the circuit board are contacted sequentially using contact needles based on the underlying netlist and tested for short circuits and interruptions. Measuring needles hang on mechanically movable "fingers" that move to the previously programmed test positions.
In all test procedures, the circuit boards on which a short circuit or an open circuit was detected are automatically separated from the circuit boards that were clearly tested without errors. For circuit boards that are faulty or not clearly tested, an error log with the exact error location is created. After the error has been successfully rectified, the circuit board is subjected to a complete test run again.
6. Base material
The CAF (Conductive Anodic Filament) resistant FR4 base material is permanently in our stock.
- in thicknesses from 0,5 to 3,2 mm
- tracking index (CTI) values up to 600 volts
- TG value up to 170 degrees Celsius
Available directly:
- FR4 TG 135°-140°; CTI 175-249 (standard)
- FR4 TG 150°
- FR4 TG 170°
- FR4 CTI 250-399 PLC 2
- FR4 CTI 400-599 PLC 1
- FR4 CTI ≥ 600 PLC 0
- CEM1
- CEM3
In addition, we can procure additional base materials of various thicknesses upon request.
6.1. Material properties
The following values apply for a material thickness of 0,5 mm or more:
6.2. Standard copper foil thickness (before galvanic copper plating)
6.3. Copper-clad laminates
7. Tolerances for twisting and warping
Please note that the warpage value increases above average if the copper distribution on the circuit board is very different locally. Especially with multilayers, a symmetrical layer structure should be planned right at the start of layout development. With asymmetrical material structures, higher torsion and warpage values can arise due to the different tensions of the glass fabric qualities.
8. Available manufacturing benefits
In order to produce economically and sustainably, we check the best possible utilization of our production panels and compare them with the most commonly used circuit board sizes in order to avoid unnecessary waste.
9. PCB thickness
We can process different PCB thicknesses regardless of the number of layers.
Lead times for special material thicknesses may vary if the desired material is not in stock.
10. Multilayer layers and structures
Multilayers consist of copper layers, prepregs and thin laminates. These can be combined in a variety of ways, resulting in an infinite variety of construction options. We manufacture multilayers with up to 24 layers. The layers can then be connected to one another via through-holes between the outer layers (vias), from an outer layer to an inner layer (blind vias) or between the inner layers (buried vias).
The most commonly used layer structures can be found on our website in the Download Center.
Of course, if you have any questions, you can also contact our sales team directly. We will be happy to send you special layer structures on request.
The following basics should be considered when creating a multilayer layout:
10.1. Symmetry
A symmetrical material structure should be planned right from the first draft, taking into account identical thin laminates and prepreg types in the same order. This significantly reduces, among other things, twisting and warping (stresses released by thermal and mechanical effects during the processing and use).
10.2. Consideration of physical influencing factors
The most important parameters are:
- dielectric strength of the layers to each other
- Permittivity ε (dielectric conductivity) / "Dk" of the base material (also dielectric constant) with loss factor "Df"
- temperature and humidity
dielectric strength
We would like to point out that the test procedures for determining the dielectric strength according to the IPC standard refer to unlaminated materials. The dielectric strength of a complete multilayer is not taken into account. We therefore recommend a sufficient safety margin.
When starting the layout design of your multilayer, we recommend that you follow the provisions of the IEC, VDE and UL® standards, which contain specifications for sufficient insulation between adjacent conductors.
permittivity ε
The thickness and quality of the dielectric (prepreg) between the copper layers influence the capacitance and impedance of the circuit board.
Physical values of common FR4 prepregs:
Physical values of common FR4 thin laminates:
temperature and humidity
Please allow for the following tolerances:
- The Dk value increases by approximately 17% after moisture absorption for typical standard FR4.
- The Df value increases by approximately 12% after moisture absorption for typical standard FR4.
Note that thermal stress, such as soldering and thermal cycling, which the PCB experiences during manufacturing and use can also affect the electrical and mechanical properties of the material. Increased temperature leads to thermal expansion, which can cause mechanical stress and potential defects such as delamination or microcracks. These effects can affect the reliability and durability of the PCB. Therefore, when planning the multilayer structure, the thermal stresses to which the PCB will be exposed during use should also be taken into account.
A well thought-out layer structure and the choice of suitable materials can help to minimize thermal stresses and extend the service life of the circuit board:
- High temperature resistant materials: High-quality prepregs and laminates from the best manufacturers can withstand thermal stress better.
- Reinforced prepregs: Prepregs with a high glass content offer better mechanical properties and higher thermal stability.
- Symmetrical structure: A symmetrical layer structure helps to evenly distribute mechanical stresses and minimize distortion.
- Optimized layer thicknesses: Plan the thicknesses of the prepregs and laminates to minimize thermal expansion.
- Sufficient distances: Make sure there is enough space between the copper layers to accommodate thermal expansion and avoid delamination.
By carefully considering these factors, you can significantly improve the performance and longevity of your multilayer printed circuit boards.
If you have any further questions, please contact our sales or production planning department. They can also provide you with layer structure samples.
11. Ladder pattern creation
The lithographic limit for the resolution of conductor patterns (track/gap) with the exposure systems we use is the thickness of the dry resist being exposed. If this resist is 50 µm thick, then the finest possible resolution is also 50 µm. Furthermore, physical processes in the subsequent electroplating and etching processes impose additional limitations. Consequently, the greater the final copper thickness, the higher the degree of undercutting on the edges, which must be compensated for in the exposure parameters.
Basically, the reproducibility of a layout depends on its design and the thickness of the copper structure. The technical restrictions of solder resist production must also be taken into account. When creating and editing the layout, there are necessary questions regarding the coverage, under-coverage or even exposure of the conductor flanks and insulation surfaces.
12. Solder mask
In the phototechnical solder resist process, the surface is embedded in a photosensitive polymer. The chemical cross-linking of the polymers is achieved through defined exposure; all non-exposed zones are developed with sharp contours even in the micrometer range. In order to achieve the required electro-physical properties of the paint, a UV bump is then applied, a kind of "glazing" of the paint surface to reduce ionic contamination, and the final thermal curing takes place.
When coating the solder resist, the solder pads of the via holes can be printed on if desired. However, this does not guarantee that the via holes will be closed (via plugging) (not suitable for vacuum testers).
However, if it is absolutely necessary to close the via hole, this process is carried out in a separate procedure in which the holes in question are specifically coated with varnish and closed.
Holes up to a diameter of 0,45 mm can be sealed with standard varnishes. For larger hole diameters, a special varnish or resin filling is required.
12.1. Parameters of solder masks
We only use solder resists based on epoxy resin, as these additionally improve the tracking resistance on the surface of the circuit boards.
When creating solder mask, solder mask clearances must be taken into account in a ratio of 1:1 to the pads, i.e. without oversizing. We calculate the expansion required for production ourselves.
The following solder mask colors are possible:
- green (default)
- blue
- black
- red
- white
TOP/BOTTOM can be painted differently.
13. Galvanic copper deposition process
The thickness of the copper plating depends on the exposure time and the current strength in the electroplating bath.
Basically, a deposit of 20 μ to 25 μ copper is applied to the surface and in the holes to be plated during the process. Thicker copper layers are possible by adjusting the process parameters or additional galvanic processes.
To achieve uniform copper deposition, the layout design should consider that conductor structures should either be completely or not embedded in the ground plane. The conductor paths or pads should be positioned centrally within a ground embedding and at equal intervals. If copper structures are unevenly distributed in the layout, over-deposition tends to occur in the "low-ground" regions. This leads to a reduction in conductor spacing, potentially resulting in electrical failure due to short circuits, as the conductors essentially fuse together. For micro-vias (unfilled): Metallization in the bore ≥ 12 µm (guideline).
13.1. Aspect Ratio
For through holes and buried vias The ratio "material thickness to hole diameter" is defined. It is calculated as follows: material thickness divided by the smallest hole diameter.
For example: 1,6 mm material thickness divided by 0,2 mm hole diameter = 8
This value is very important for the manufacturability of the circuit board, because the larger the aspect ratio, the more complex it is to produce metallization in the holes.
For blind vias and micro-vias The aspect ratio is calculated as drilling depth (layer spacing) ÷ hole diameter; limit ≤ 1 : 1.
13.2. Microfilling (Via-in-Pad)
This technology enables the simultaneous filling of blind vias and the reinforcement of through-holes.
In HDI circuits, there is usually insufficient space to route signals to different layers via through-holes. A space-saving solution is via-in-pad: Blind vias are positioned directly in SMD pads and filled with copper after drilling; the planar surface facilitates the soldering process. Example (fine-pitch): BGA/CSP/flip-chip zones with via-in-pad for short transitions and uniform paste distribution. Due to this filling, only a very small amount of solder flows into the remaining surface dimple, enabling a proper solder joint. Target value for the surface dimple: ≤ 25 µm (guideline value according to ZVEI). The maximum drill diameter is 0,15 mm.
13.3. Via plugging using resin filling (also suitable for via-in-pad technology)
Sealing both through and blind vias with resin combined with subsequent over-metallization is an alternative to microfilling, but this process is more complex in terms of process technology.
The advantages over microfilling are that
- Through holes from 0,1 mm up to 2 mm can also be sealed; however, the material thickness must not be smaller than the hole diameter.
- a planar closure of the holes is possible; no dent (dimple) remains in the pad.
14. Surface finishing
We can currently produce the following finishes for you:
- Hot air tinning lead-free (HAL) – Sn / 0,3 Ag / 0,7 Cu / 0,02 Ni
- Electroless Nickel-Gold (ENIG) – 99,9 Au
- Electroless Nickel-Palladium-Gold (ENEPIG)
- Chemical tin (chem. Sn)
- Chemical silver (chem. Ag)
- Organic Tarnish Protection (OSP)
- Galvanic nickel gold (hard and bond gold) – hard 99,8 Au / soft 99,99 Au
Properties of the different end surfaces:
15. Printing techniques
15.1. Serialization
In order to ensure that circuit boards can be clearly identified, individualized marking of the individual circuit boards can also be selected within a series. This marking is applied automatically (direct exposure of the structures or assembly printing) in white and can consist of static information (e.g. production date, date code, etc.) and consecutive numbering in chronological order and can be displayed in the following machine-readable formats:
- 1D & 2D barcodes, data matrix, QR codes.
15.2. Label printing / assembly printing
To avoid interruptions or blurring within the typeface, the line thickness of the marking print should not be less than 130 µ and the font height should not be less than 1000 µ. The soldering surfaces should be freed from the marking print by at least 250 µ all around, as otherwise an unclean print image and pressure on the soldering surfaces is possible.
15.3. Carbon printing
15.4. Strippable varnish
The layer thickness of the peel-off varnish is approx. 500 µ.
Holes that are covered with strippable varnish should not exceed a size of 1,8 mm.
16. Contour processing
We drill, mill and score your circuit boards according to your specifications and wishes. The type of mechanical processing depends on your individual specifications. In our drilling and milling center we work with modern, fully automatic CNC drilling and milling machines. These techniques enable processing within the DIN 7168 standard “medium” (medium accuracy) and “fine” (precise accuracy).
If non-plated holes are positioned in a solder pad, the pad must be at least 500 µ larger than the hole all the way around. Otherwise, solder pads may be removed.
If no information is available about the type of holes in plated-through circuit boards, we will independently determine, to the best of our knowledge, which holes will be plated through and which will not be plated through.
If drilling or dimension plans are provided that do not correspond to the drilling programs or the contour according to the layout data, the drilling programs and the contour according to the layout data are binding for production in any case.
Unless otherwise specified, the center point (= center vector) of the contour lines in the layout data is decisive for the contour of the circuit board. If slot millings (slots) are represented by rectangular contours, we assume that the corner radius is included.
16.1. Scoring (notch milling)
If no plus tolerance is permitted for the contour, the desired minus tolerance must be added to the above-mentioned “Distance between conductor tracks and contour” values.
16.2. Milling
As an alternative to scoring, we offer contour milling. The advantage over scoring is that the outer contours can be machined in the most special shapes and cutouts, such as round, oval, wave-shaped, zigzag, etc.
When milling, please note:
- If the delivery is to be made in milled panels, a standard distance of 2,0 mm between the circuit boards is sufficient to be able to place milling bars between the individual boards.
- If the delivery is not to be made in panels, a distance of at least 8,0 mm from board to board must be taken into account in order to be able to ultimately separate the circuit boards.
16.3. Deep milling and drilling / countersinking
Milling and drilling with a defined Z-axis is carried out according to your drawing specifications. Countersinks are produced at 45° or 30° as standard. The specifications for this can be set individually.
16.4. Milling and scoring combination
In some cases it makes sense to combine both milling and scoring to achieve the best compromise between cost and material loss. Our CNC machines are able to implement these combinations precisely.
16.5. Chamfers
For easier installation of plug contacts (e.g. PCI connectors), edge chamfering with 45° or 30° at different depths is possible.
16.6. Edge metallization
To realize flank contacts, we can produce special edge metallizations (eg side plating or castellated holes). This is particularly useful when improved electrical conductivity or shielding is required.
16.7. Semiflex
17. Drilling and milling tolerances
**depending on the hole diameter
***provided that the drilling process is carried out in a machine setup (tenting)
18. Storage
18.1. Humidity
Due to the epoxy resin in the base material of the circuit boards, these (particularly multilayers) are extremely hydrophilic; this means that the water molecules dissolved in the air are absorbed by the material. Depending on the ambient conditions, moisture equilibria are established in materials. Under storage conditions of, for example, 20 degrees Celsius and 35 percent humidity, a moisture absorption of 12 percent (in percent by weight of the epoxy resin) can be recorded after just 0,12 days. The crucial point here is that as the moisture absorption increases, the gas pressure inside the circuit board also increases, which is caused by the high temperatures in the soldering process. If the moisture absorption exceeds 0,17 percent, a critical gas pressure of 8 - 10 bar is reached, at which delamination and blistering can occur. Epoxy resin can absorb up to 0,5% by weight of moisture.
To ensure that the moisture content and the adhesive bond of the material are perfect, we carry out a delamination test on a test piece after completion of multilayer circuit boards.
To further prevent or reduce moisture absorption, we strongly recommend the following points:
Warehouse environment
Circuit boards should be stored in a constantly heated environment under controlled conditions until shortly before soldering/processing, preferably in darkened rooms. Due to climatic changes, a controlled storage environment is becoming increasingly important in order to maintain the quality of the circuit boards. Humidity and temperature fluctuations should be minimized and the packaging of the circuit boards should be checked for integrity before processing.
We strongly recommend that you adhere to the following conditions in the storage environment to minimize moisture absorption:
-
room temperature 18- 21 °C
- relative humidity < 50 %
Packaging
Storage is preferably in closed containers. We would like to point out that there is no reliable protection against moisture due to the water vapor permeability of polyethylene bags. To improve protection, we therefore also offer to pack the circuit boards in DRY-SHIELD protective bags. It is also possible to vacuum seal them and/or provide them with indicators and drying bags. The protective films/bags should only be removed shortly before soldering/processing. We recommend vacuum sealing any remaining quantities, or at least sealing them securely with adhesive tape or by clamping the film between the circuit boards and storing them in boxes to avoid drafts.
storage time
The storage time of circuit boards should be as short as possible and consumption should be based on the "first in, first out" rule. For storage times of more than 3 months (based on the production period), it is difficult to predict when moisture absorption can lead to problems with soldering/processing due to a wide range of influencing parameters such as layout, layer structure, etc. To provide reliable evidence of the storage time, we can apply a production date/date code to the circuit boards by arrangement. Please note that the shelf life also depends on the final surface selected. You can find orientation values for this in the surface finishing section of this document. Please always use up opened packages first.
18.2. Soldering test
Printed circuit boards that have already been stored for several months and whose transport conditions are unclear (goods transported by freight forwarders in all weather conditions and temperatures) should definitely be subjected to a soldering test before further processing.
18.3. Preconditioning/Drying
To reduce the amount of moisture absorbed, we recommend drying the goods in an oven, regardless of the outcome of a soldering test. The circuit boards should preferably be dried vertically in a rack. If you store the circuit boards with us for more than four months (e.g. when ordering on demand), we will definitely dry them before delivery.
If drying is possible in a vacuum oven at 50 mbar, the temperature can be reduced by around 20 °C and the time by around 30 minutes. This method is advantageous for the sensitive "chemical tin" surface. Afterwards, a few test pieces should be used to determine whether the solder is still sufficiently wet; otherwise, the chemical tin must be refreshed.
After drying, processing of the circuit boards should begin immediately, as the hydrophilic properties of the circuit board remain. The time between the various soldering processes must be kept as short as possible and should not exceed 8 hours. This is the only way to avoid excessive moisture absorption in unprotected material. Dried and tempered circuit boards will quickly become saturated with water from the ambient air.
18.4. Product-specific requirements
The values mentioned in the previous sections are guidelines only.
- The different soldering processes and profiles cause different loads. The thermal load in convection ovens is not as high as in infrared ovens or steam phases.
- If the recommended storage conditions cannot be maintained consistently, the material will absorb more water than is possible under constant conditions. Packaging in DRY-SHIELD protective bags can help here.
- If the layout contains large, closed copper surfaces, the moisture will take a longer time to escape.
- the multilayer structure. See: 10.2. Consideration of physical influencing factors.
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