Proven precision in printed circuit board manufacturing

How PRECOPLAT ensures quality – from AOI to electrical final testing (E-test) to impedance control.

The high-density printed circuit boards (HDI) Besides the layout, process control is particularly crucial. This includes automated optical inspection (AOI) with the finest resolution, final electrical testing with clearly defined limits, and a layer stack-up that maintains specified impedances even under real-world conditions. PRECOPLAT, a manufacturer of bare printed circuit boards "Made in Germany," relies precisely on this interplay – as an integral part of production, from the initial inner layer layout to final inspection.

Katharina VÖLKERThe management emphasizes the importance of AOI as an integral component of quality assurance: “AOI is not implemented as an isolated solution, but as a continuous inspection module across all production stages. With a minimum structure of 25 µm, we can reproducibly capture dense geometries in series production – inline, traceable, and reliably documented.” The AOI platform used is from the CIMS Galaxy 25-µThe -family is suitable for line/space testing up to 25 µm.Microlight™ Gen II It ensures homogeneous illumination, while adaptable algorithms stabilize detection performance with a low false-call rate. Options such as [list of options] are available for specific tasks. 2D metrology, final visual inspection as well as Laser borehole inspection ready.

Technically, AOI follows a standardized process: The image reference is... IPC-A-600Acceptance is based on the ordered class (2/3). PRECOPLAT thus meets the expectations of developers who explicitly request optical inspection – and combines visual testing with the usual standards and verifications of series production.

At the end of the production process, a electrical final test This electrical final test checks for open circuits and short circuits against a netlist generated from customer data. The test procedure depends on the batch size and design. Test adapter (parallel test) or Flying probe (finger tester)Open tests are performed when the network resistance exceeds 10 Ω, while short tests are performed when the resistance between independent networks is below 10 MΩ. Faulty or inconclusive circuit boards are automatically separated, logged, and fully retested after rework. This is done in accordance with the guidelines. Production and testing data stored for a period of at least 10 years. at Precoplat The documentation is stored. It is supplemented by X-ray measurements, such as layer registration and coating thickness measurement. "AOI detects – the E-test confirms; both together minimize field results," he emphasizes. Andreas BRÜGGEN, Managing Director.

For HDI designs, this is Via Management of crucial importance. That Via-in-Pad with Microfilling Enables short transitions in BGA/CSP zones. Blind vias are placed directly in the pad, copper-filled, and planarizedOne possible alternative is the Resin pluggingThis method is particularly suitable for sealing through holes with a diameter of 0,10 mm to 2,00 mm. A key advantage of this method is the complete planarity of the pads. For blind vias and micro-vias, the aspect ratio is limited to a maximum of 1:1 (drill depth ÷ diameter). The relevant parameters are specified in the [document/section/etc.]. "Technical Delivery Conditions (TLB), Recommendations and Design Rules for Technical Delivery Conditions (TLB)"Printed circuit boards" from PRECOPLAT transparently stored and are in Design Rule Check Project-specific insurance coverage.

The benefit arises from the System networkAOI provides pixel-accurate, statistically usable defect images; the E-test confirms electrical integrity; Impedance engineering and HDI manufacturing ensure functionality within the target system. By combining individual test steps into a single step... Closed-loop Development and manufacturing are equally catered for – from prototypes to large-scale production. Cycle time, verification, and reproducibility remain unchanged.

Share:

More articles

Galvanic Nickel Gold (hard and bond gold)

Also known as hard gold plating. In contrast to the ENIG process, nickel is also used as a diffusion barrier to the copper, but the gold is deposited galvanically, i.e. with an external power source. This means that much thicker layers of 0,8 - 5 µ can be achieved. This "hard gold" is used for circuit boards with connector strips that are plugged in multiple times. The thicker the gold, the higher the number of plug-in cycles (example: 0,4 µ Au = 20 plug-in cycles, 2 µ = 500 plug-in cycles).

OSP (Organic Surface Protection)

OSP is an organic solution that is selectively deposited on solderable copper surfaces with a layer thickness of 0,02 to 0,06 µ using an immersion or rinsing bath. The surface is flat and is well suited for fine SMD assembly. Multiple soldering processes are not possible because the transparent layer decomposes at temperatures above 150 °C.

The shelf life is limited to 6 months.

Chemical silver (chem Ag.)

Chemical silver is a metallic, highly re-solderable surface with a layer thickness of 0,15 - 0,45 µ that is deposited on soldering points without external current (similar to the chemical tin process). The surface is flat and is well suited for SMD assembly.

A storage period of up to 6 months is possible. Similar to chemical tin, the surface loses its solderability due to fluctuations in ambient temperature and humidity. The surfaces must under no circumstances come into contact with materials containing sulphur (such as certain types of wrapping paper).

Chemical tin (chem. Sn)

Chemical tin is a metallic, very easy to solder finish. A thin layer of approx. 0,8 - 1,2 µ tin is deposited without external current on the copper of the soldering points, where it prevents the copper from oxidizing. The surface of the pads is very flat and is therefore particularly suitable for SMD, CoB and HDI and press-fit technology.

The storage time should not exceed 6 months. Humidity and temperature differences during storage can affect the solderability.

ENEPIG (Electroless Nickel Electroless Palladium Immersion Gold)

Between the nickel and gold process steps in the ENIG process, in the ENEPIG process, additional palladium is added as an intermediate layer (0,05 – 0,25 µ thick) into the final surface without external current.

This additional layer is not only ideal for all soldering methods, but is primarily used for gold wire bonding. This process is considered a very expensive special application.

Electroless Nickel Immersion Gold (ENIG)

ENIG or chemical nickel gold is a metallic, very easy to solder finish. It is deposited on the copper layer of the soldering points with a layer thickness of 4 - 9 µ nickel and ideally 0,05 - 0,1 µ gold, which prevents the copper from oxidizing. The deposition takes place without external current using catalytic processes and the electrical potential difference (valence) of the metals used.

The surface is very flat, the multiple solderability is suitable for SMD, Cob and HDI technology as well as aluminum wire bonding and has a storage life of up to 12 months.

The surface is IPC-4552 specified and meets the current requirements of RoHs and WEE.

hot air tinning (HAL = Hot Air Leveling)

The term hot air tinning is used both for the production process and for the surface of printed circuit boards with 99,55% Sn (tin), 0,3% Ag (silver) and 0,15 -0,05% Ni (nickel). It is intended to protect the underlying copper of the soldering points from oxidation.

The circuit boards are immersed in a hot melt (> 260°C) made of the metals mentioned. The surfaces to be tinned are then blown flat with hot compressed air and the holes are blown free. The surface is very suitable for multiple soldering and can be stored for up to 12 months.

HAL is very attractive in terms of quality and price for radial assembly and single-sided SMD technology. Our solder is lead-free and complies with RoHS guidelines.